In the conventional integrated circuit memory device, only the column select lines connected physically have been activated. Further, the column select lines have been replaced with spare column select lines in unit of the column select lines once activated, in order to relieve defective cells arranged in the column.
In the case of a synchronous random access memory (referred to as SDRAM, hereinafter), when only one physically connected column select line is activated for serial access, the following problems arise: in the case where serial access is made when the endmost address of the column select line becomes a tap address, the column select line must be activated at the minimum cycle. In this case, however, there exists a problem in that a large load is applied to the circuit system and thus a high speed access cannot be realized. In addition, when the select lines are replaced with the spare select lines in unit of the select lines activated simultaneously, since the spare column lines are used sometime wastefully, there arises a problem in that the production yield is deteriorated.